IBM POWER指令集架構
外觀
POWER、PowerPC,以及Power ISA架構 |
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飛思卡爾(原摩托羅拉) |
IBM |
IBM/任天堂 |
其他 |
相關條目 |
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IBM POWER指令集架構是由IBM公司開發的一種精簡指令集電腦(RISC)指令集架構(ISA)。該名稱是「增強RISC效能最佳化」(Performance Optimization With Enhanced RISC)的首字母縮略字[1]。
參考資料
[編輯]- ^ Bakoglu, H. B.; Grohoski, G. F.; Montoye, R. K. The IBM RISC System/6000 processor: Hardware overview. IBM Journal of Research and Development. January 1990, 34 (1): 12–22. doi:10.1147/rd.341.0012.
延伸閱讀
[編輯]- Weiss, Shlomo; Smith, James Edward. POWER and PowerPC. Morgan Kaufmann. 1994. ISBN 978-1558602793. — Relevant parts: Chapter 1 (the POWER architecture), Chapter 2 (how the architecture should be implemented), Chapter 6 (the additions introduced by the POWER2 architecture), Appendixes A and C (describes all POWER instructions), Appendix F (describes the differences between the POWER and PowerPC architectures)
- Dewar, Robert B.K.; Smosna, Matthew. Microprocessors: A Programmer's View. McGraw-Hill. 1990. — Chapter 12 describes the POWER architecture (referred to as RIOS, its earlier name) and its origins
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